View ASDL-3023_4112739.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ASDL-3023
IrDA Data Compliant Low Power 4Mbit/s with Remote Control Infrared Transceiver
Data Sheet
Description
The ASDL-3023 is a new generation low profile high speed enhanced infrared (IR) transceiver module that provides the capability of (1) interface between logic and IR signals for through-air, serial, half-duplex IR data link, and (2) IR remote control transmission for universal remote control applications. The ASDL-3023 can be used for IrDA as well as remote control application without the need of any additional external components for multiplexing. The ASDL-3023 is fully compliant to IrDA Physical Layer specification version 1.4 low power from 9.6 kbit/s to 4.0 Mbit/s (FIR) and IEC825 Class 1 eye safety standards. The ASDL-3023 can be shutdown completely to achieve very low power consumption. In the shutdown mode, the PIN diode will be inactive and thus producing very little photocurrent even under very bright ambient light. It is also designed to interface to input/output logic circuits as low as 1.5V. These features are ideal for battery operated mobile devices such as PDAs and mobile phones that require low power consumption.
Features
General Features * Operating temperature from -25 C ~ 85C - Critical parameters are guaranteed over temperature and supply voltage * Vcc Supply 2.4 to 3.6 V * Interface to Various Super I/O and Controller Devices - Input/Output Interface Voltage of 1.5 V * Miniature Package Miniature Package (shielded) Height : 1.75 mm Height : 1.95 mm Width : 7.5 mm Width : 8.0 mm Depth : 2.75 mm Depth : 3.00 mm * Moisture Level 3 * Power Saving using 3 ILED range (SIR, MIR/FIR, RC mode) * LED stuck high protection * High EMI Performance * High ESD Performance * Designed to Accommodate Light Loss with Cosmetic Windows * IEC 825-Class 1 Eye Safe
Applications
Mobile data communication and universal remote control * Mobile Phones * PDAs * Digital Still Camera * Printer * Handy Terminal * Industrial and Medical Instrument
IrDA Features
* Fully Compliant to IrDA 1.4 Physical Layer Low Power Specifications from 9.6 kbit/s to 4.0 Mb/s - Link distance up to 30cm (minimum) * Complete shutdown * Low Power Consumption - Low shutdown current - Low idle current
Application Support Information
The Application Engineering Group is available to assist you with the application design associated with ASDL3023 infrared transceiver module. You can contact them through your local sales representatives for additional details.
Remote Control Features
* Wide angle and high radiant intensity * Spectrally suited to remote control transmission function * Minimum peak wavelength of 880nm * 2 RC Transmission Mode - Single TXD (Programmable Mode) - Dual TXD (Direct)
Vdd
R1
GND
CX2
Vdd (7)
CX1
GND (8)
ASDL-3023 TRANSCEIVER MODULE
IOVCC(5) SD(4)
CX5
Regulated Voltage & Current Source
TRANSCEIVER IC
Photodetector
RECEIVER
RXD(3) VLED
R2
Low Pass Filter AGC & Signal Reference Processor
Amplifier
Output Buffer
CX3
CX4
LEDA (1)
TXD_RC Input TXD_IR Input TRANSMIT TER
TRANSMITTER
RC_Buffer
TxD_RC(6) TxD_IR(2)
Eye Safety-RC
Switched Current Source
IR_Buffer
LED
Eye Safety-IR
Figure 1a. Functional Block Diagram of ASDL-3023
Vdd
R1
GND
CX2
Vdd (7)
CX1
GND (8)
ASDL-3023 TRANSCEIVER MODULE
IOVCC(5) SD(4)
CX5
Regulated Voltage & Current Source
TRANSCEIVER IC
Photodetector
RECEIVER
RXD(3) VLED
R2
Low Pass Filter AGC & Signal Reference Processor
Amplifier
Output Buffer
SHIELD
CX3
CX4
LEDA (1)
TXD_RC Input TXD_IR Input
TRANSMITTER
RC_Buffer
TxD_RC(6) TxD_IR(2)
Eye Safety-RC
Switched Current Source
LED
IR_Buffer
Eye Safety-IR
TRANSMIT TER
Figure 1b. Functional Block Diagram of ASDL-3023-S21
Order Information
Part Number ASDL-0-0 ASDL-0-008 ASDL-0-S (Shielded) Packaging Type Tape and Reel Tape and Reel Tape and Reel Package Front Option Top Option Front Option Quantity 500 500 500
Marking Information
The unit is marked with `XYWLL' on the shield Y = year W = work week LL = lot number
ASDL-3023-021, ASDL-3023-008 and ASDL-3023-S21 Pinout, Rear View
Rear View
I/O Pins Configuration Table
Pin Symbol LEDA TxD_IR RxD SD IOVCC TxD_RC VCC GND Description LED Anode IrDA transmitter data input. IrDA receive data Shutdown Input/Output ASIC voltage RC transmitter data input. Supply Voltage Ground Input. Active High Input. Active High Output. Active Low Input. Active High I/O Type Notes Note Note Note Note 4 Note 5 Note 6 Note 7 Note 8
8
7
6
5
4
3
2
1
4 5 6 7 8
Figure 2a. Pin out for ASDL-3023-021 and ASDL-3023-008,
Rear View
8
7
6
5 4 (Shielded)
3
2
1
Figure 2b. Pin out for ASDL-3023-S21
Notes: 1. Tied through external resistor, R2, to Vled. Refer to the table below for recommended series resistor value. 2. This pin is used to transmit serial data when SD pin is low. If held high for longer than 50 ms, the LED is turned off. Do NOT float this pin. 3. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. The pin is in tri-state when the transceiver is in shutdown mode 4. Complete shutdown of IC and PIN diode. The pin is used for setting IR receiver bandwidth, range of IR LED current and RC drive programming mode. Refer to section on "Bandwidth Selection Timing" and "Remote Control Drive Modes" for more information. Do NOT float this pin. *** 5. Connect to ASIC logic controller supply voltage or Vcc. The voltage at this pin should be equal to or less than Vcc. 6. Logic high turns on the RC LED. If held high longer than 50 ms, the RC LED is turned off. Do NOT float the pin. 7. (i) Regulated, 2.4V to 3.6V (ii) This pin recommended to turn on before other pin. 8. Connect to system ground.
4
Recommended Application Circuit Components
Component R R Recommended Value 4.7W,5%, 0.5 watt for Vcc .0V .7W, for .4 VLED .7V; .W, for .7 CX, CX, CX5 CX, CX4
Notes: CX1, CX2, CX3 & CX4 must be placed within 0.7cm of ASDL-3023 to obtain optimum noise immunity
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is 50C/W. Parameter Storage Temperature Operating Temperature LED Anode Voltage Supply Voltage Input Voltage : TXD, SD/Mode Output Voltage : RXD Peak IR LED Current Peak RC LED Current Symbol TS TA VLEDA VCC VI VO IIRLED (PK) IRCLED(PK) Min. -40 -5 -0. -0. -0. -0. Max. +00 +85 6.5 6 5.5 5.5 00 00 Units C C V V V V mA mA 5% duty cycle, 90 ms pulse width 0% duty cycle, 90 ms pulse width Fig Fig 4 Conditions Ref
CAUTION: The CMOS INhereNT TO The deSIgN Of ThIS COMpONeNT INCreASeS The COMpONeNT'S SUSCepTIbIlITy TO dAMAge frOM eleCTrOSTATIC dISChArge (eSd). IT IS AdvISed ThAT NOrMAl STATIC preCAUTIONS be TAkeN IN hANdlINg ANd ASSeMbly Of ThIS COMpONeNT TO preveNT dAMAge ANd/Or degrAdATION whICh MAy be INdUCed by eSd
5
Recommended Operating Conditions
Parameter Operating Temperature Supply Voltage Input/Output Voltage Logic Input Voltage for TXD, SD/Mode Receiver Input Irradiance Logic High Logic Low Logic High Symbol Min. TA VCC IOVCC VIH VIL EIH -5 .4 .5 IOVcc-0.5 0 0.0090 0.05 Logic Low IR LED (Logic High) Current Pulse Amplitude - SIR Mode IR LED (Logic High) Current Pulse Amplitude - MIR/FIR Mode RC LED (Logic High) Current Pulse Amplitude Receiver Data Rate Ambient Light EIL ILEDA ILEDA ILEDA 0.0096 65 Typ. Max. +85 .6 .6 IOVcc 0.4 500 500 0. mW/cm mA mA 50 50 4.0 mA Mbit/s See IrDA Serial Infrared Physical Layer Link Specification, Appendix A for ambient levels Units C V V V V mW/cm For in-band signals 5.kbit/s [] 0.576 Mbit/s in-band signals 4.0 Mbit/s [] For in-band signals [] Conditions
Note : 3. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 lp 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
6
Electrical and Optical Specifications
Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25C, Vcc set to 3.0V and IOVcc set to 1.5V unless otherwise noted.
Receiver
Symbol q/ lP Logic High VOH Logic Low VOL [4, 5] RxD_IrDA Pulse Width (SIR) tRPW(SIR) RxD_IrDA Pulse Width (MIR) [4, 6] tRPW(MIR) [4, 7] RxD_IrDA Pulse Width (Single) (FIR) tRPW(FIR) RxD_IrDA Pulse Width (Double) (FIR) [4, 7] tRPW(FIR) RxD_IrDA Rise & Fall Times tr, tf [8] Receiver Latency Time tL Receiver Wake Up Time [9] tRW Parameter Viewing Angle Peak Sensitivity Wavelength RxD_IrDA Output Voltage Min. 0 IOVcc - 0.5 0 00 80 00 60 00 00 Typ. 875 IOVCC 0.4 4 500 75 90 Max. Units nm V V ms ns ns ns ns ms ms Conditions
IOH = -00 mA, EI 0. mW/cm q/ 5, CL=9pF q/ 5, CL=9pF q/ 5, CL=9pF q/ 5, CL=9pF CL=9pF EI = 9.0 mW/cm EI = 0 mW/cm
Infrared (IR) Transmitter
Parameter IR Radiant Intensity (SIR Mode) IR Radiant Intensity (MIR/FIR Mode) IR Viewing Angle IR Peak Wavelength TxD_IrDA Logic Levels TxD_IrDA Input Current Wake Up Time [0] Maximum Optical Pulse Width [] TXD Pulse Width (SIR) TXD Pulse Width (MIR) TXD Pulse Width (FIR) TxD Rise & Fall Times (Optical) Symbol IEH IEH q/ lP VIH VIL IH IL tTW tPW(Max) tPW(SIR) tPW(MIR) tPW(FIR) tr, tf VON
(IR_LEDA)
Min. 4 0 0 850 IOVcc-0.5 0
Typ. 0 50
Max.
Units mW/sr mW/sr
Conditions IR_ILEDA = 65mA, q/ 5, TxD_IR VIH, TA = 5C IR_ILEDA = 50mA, q/ 5, TxD_IR VIH, TA = 5C
885
High Low High Low
60 900 IOVCC 0.5
0.0 -0.0 80 5 .6 7 5
0
600 40
nm V V mA mA ns ms ms ns ns ns ns V
VI VIH 0 VI VIL
tPW(TXD_IR)=.6ms at 5. kbit/s tPW(TXD_IR)=7ns at .5 Mbit/s tPW(TXD_IR)=5ns at 4.0 Mbit/s tPW(TXD_IR)=.6ms at 5. kbit/s tPW(TXD_IR)=5ns at 4.0 Mbit/s IR_ILEDA=65mA, IR VLED = .6V, R = 4.7W, VI(TxD) VIH IR_ILEDA=50mA, IR VLED = .6V, R = 4.7W, VI(TxD_IR) VIH
IR LED Anode On-State Voltage (SIR Mode) IR LED Anode On-State Voltage (MIR/FIR Mode)
.
VON
(IR_LEDA)
.
V
7
Remote Control (RC) Transmitter
Parameter RC Radiant Intensity RC Viewing Angle RC Peak Wavelength TxD_RC Logic Levels TxD_RC Input Current RC LED Anode On-State Voltage Symbol IEH q/ lP VIH VIL IH IL VON
(RC_LEDA)
Min. 0 880 IOVcc-0.5 0
Typ. 80 885 0.0 -0.0
Max. 60 900 IOVCC 0.5
Units mW/sr nm V V mA mA V
Conditions RC_ILEDA = 50mA, q/ 5, TxD_RC VIH, TA = 5 C
High Low High Low
VI VIH 0 VI VIL RC_ILEDA=50mA, RC VLED = .6V, R = 4.7W, VI(TxD_RC) VIH Conditions VI VIH 0 VI VIL VSD IOVCC-0.5, TA=5C VI(TxD) VIL, EI=0 VI(TxD) VIL, EI=0mW/cm
Transceiver
Parameters Input Current Supply Current High Low Shutdown Idle (Standby) Active Symbol IH IL ICC ICC ICC .0 .5 - Min. Typ. 0.0 -0.0 Max. .9 Units mA mA mA mA mA
Note: [4] An in-band optical signal is a pulse/sequence where the peak wavelength, lP, is defined as 850 nm lP 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification version 1.4. [5] For in-band signals 115.2 kbit/s where 9 mW/cm2 EI 500 mW/cm2. [6] For in-band signals 1.152 Mbit/s where 22 mW/cm2 EI 500 mW/cm2. [7] For in-band signals 4 Mbit/s where 22 mW/cm2 EI 500 mW/cm2. [8] Latency is defined as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity. [9] Receiver Wake Up Time is measured from Vcc power ON to valid RxD_IrDA output. [10] Transmitter Wake Up Time is measured from Vcc power ON to valid light output in response to a TxD_IrDA pulse. [11] The Max Optical PW is defined as the maximum time which the IR LED will turn on, this, is to prevent the long Turn On time for the IR LED.
ILED(PK) Maximum Peak LED Current - mA
300 250 200 150 100 50 0 -40 -20 0 20 40 60 TA - Ambient Temperature - oC 80 100
I LED(DC) , Maximum DC LED Current - mA
350
Max. Permissible Peak LED Current
70 60 50 40 30 20 10 0 -40 -20
Max. Permissible DC LED Current
Rja = 400degC/W
0 20 40 60 TA - Ambient Temperature - oC
80
100
Figure 3. Maximum Peak IR LED current vs. ambient temperature. Derated based on TJMAX = 100C.
Figure 4. Maximum Peak RC LED current vs. ambient temperature. Derated based on TJMAX = 100C.
8
Figure 5a. Timing Waveform - RXD Output Waveform
Figure 5b. Timing Waveform - LED Optical Waveform
Figure 5c. Timing Waveform - TXD "Stuck-on" Protection Waveform
Figure 5d. Timing Waveform - Receiver Wakeup Time Waveform
Figure 5e. Timing Waveform - TXD Wakeup Time Waveform
9
Package Dimension: ASDL-3023-021 (Shieldless, Front) and ASDL-3023-008 (Shieldless, Top)
0
Package Dimension: ASDL-3023-S21 (Shielded, Front)
Tape & Reel Dimensions
ASDL-3023-021 (Shieldless, Front)
ASDL-3023-008 (Shieldless, Top)
ASDL-3023-S21 (Shielded, Front)
Progressive Direction Empty (40mm min) Parts Mounted Leader (400mm min) Empty (40mm min)
Option # 021 S21 008
"B" 330 330 330
"C" 80 80 80
Quantity 2500 2500 2500
Unit: mm
Detail A 2.0 0.5
13.0 0.5
B
C
R1.0 LABEL 21 0.8
Detail A
16.4
+2 0
2.0 0.5
ASDL-3023 Moisture Proof Packaging
All ASDL-3023 options are shipped in moisture proof package. Once opened, moisture absorption begins. This part is compliant to JEDEC Level 3.
UNITS IN A SEALED MOISTURE-PROOF PACKAGE
PACKAGE IS OPENED (UNSEALED)
PARTS ARE NOT RECOMMENDED TO BE USED
NO
ENVIRONMENT LESS THAN 30 oC AND LESS THAN 60% RH YES
PACKAGE IS OPENED LESS THAN 168 HOURS NO
YES
NO BAKING IS NECESSARY
NO
PACKAGE IS OPENED LESS THAN 15 DAYS YES PERFORM RECOMMENDED BAKING CONDITIONS
Figure 6. Baking Conditions Chart
Recommended Storage Conditions
Storage Temperature Relative Humidity 0C to 0C below 60% RH
Baking Conditions
Package In reels In bulk Temp 60 C 00 C Time 48hours 4hours
Time from unsealing to soldering
After removal from the bag, the parts should be soldered within 7 days if stored at the recommended storage conditions. When MBB (Moisture Barrier Bag) is opened and the parts are exposed to the recommended storage conditions more than 7 days but less than 15 days the parts must be baked before reflow to prevent damage to the parts.
Note: To use the parts that exposed for more than 15 days is not recommended.
Baking should only be done once.
4
Recommended Reflow Profile
255 230 217 200 180 150 120 80 25 0 P1 HEAT UP 50 P2 SOLDER PASTE DRY 100 150 200 P3 SOLDER REFLOW P4 COOL DOWN 250 300 t-TIME (SECONDS) R1 MAX 260C R3 R4
T - TEMPERATURE (C)
R2
60 sec to 90 sec Above 217C
R5
Process Zone Heat Up Solder Paste Dry Solder Reflow Cool Down Time maintained above liquidus point , 7C Peak Temperature Time within 5C of actual Peak Temperature Time 5C to Peak Temperature
Symbol P, R P, R P, R P, R4 P4, R5
DT 5C to 50C 50C to 00C 00C to 60C 60C to 00C 00C to 5C > 7C 60C 5C to 60C
Maximum DT/Dtime or Duration C/s 00s to 80s C/s -6C/s -6C/s 60s to 90s 0s to 40s 8mins
The reflow profile is a straight-line representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different DT/Dtime temperature change rates or duration. The DT/Dtime rates or duration are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and ASDL-3023 pins are heated to a temperature of 150C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 3C per second to allow for even heating of both the PC board and ASDL-3023 pins. Process zone P2 should be of sufficient time duration (100 to 180 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder.
Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 260C (500F) for optimum results. The dwell time above the liquidus point of solder should be between 60 and 90 seconds. This is to assure proper coalescing of the solder paste into liquid solder and the formation of good solder connections. Beyond the recommended dwell time the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25C (77F) should not exceed 6C per second maximum. This limitation is necessary to allow the PC board and ASDL-3023 pins to change dimensions evenly, putting minimal stresses on the ASDL-3023. It is recommended to perform reflow soldering no more than twice.
5
Appendix A: ASDL-3023 SMT Assembly Application Note Solder Pad, Mask and Metal Stencil
Figure A1. Stencil and PCBA
Recommended land pattern for ASDL-3023-021
Mounting Centre
Recommended land pattern for ASDL-3023- 008
Mounting Centre 0.44 0.4 1.05 0.17 0.7
1.55 0.1 0.775 FIDUCIAL 1.75 0.55 1.05 1.35 3.75 7.5
1.74
1.60 0.55 1.05 1.35 3.75 7.5
UNIT: mm
Figure A2a. Recommended land pattern, ASDL-3023-021
UNIT: mm
Recommended land pattern for ASDL-3023- S21
1.3 Mounting Centre 1.5 0.3
Figure A2c. Recommended land pattern, ASDL-3023-008
1.55 0.775
0.1
1.75 0.55 1.05 1.35 3.75 7.5
UNIT: mm
Figure A2b. Recommended land pattern, ASDL-3023-S21
6
Recommended Metal solder Stencil Aperture
It is recommended that only a 0.11 mm (0.004 inch) or a 0.127 mm (0.005 inch) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the Table 1 below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Aperture opening for shield pad is 2.6 mm x 1.5 mm(for ASDL3023-S1) as per land pattern. Compared to 0.127mm stencil thickness 0.11mm stencil thickness has longer length in land pattern. It is extended outwardly from transceiver to capture more solder paste volume.
Adjacent Land Keepout and Solder Mask Areas
Adjacent land keepout is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2mm.It is recommended that two fiducially crosses be placed at mid length of the pads for unit alignment.
Note: Wet/Liquid Photo-imaginable solder resist/mask is recommended
j
h
k
l Solder Mask
Figure A3. Solder stencil aperture
Table 1.
Stencil thickness, t(mm) 0.7mm 0.mm Aperture size(mm) Length,l .75+/-0.05 .4+/-0.05 Width,w 0.55+/-0.05 0.55+/-0.05 Dimension h l k j mm 0. .0 .85 0.
7
Appendix B: PCB Layout Suggestion
The effects of EMI and power supply noise can potentially reduce the sensitivity of the receiver, resulting in reduced link distance. The PCB layout played an important role to obtain a good PSRR and EM immunity resulting in good electrical performance. Things to note: 1. The ground plane should be continuous under the part, but should not extend under the shield trace. 2. The shield trace is a wide, low inductance trace back to the system ground. CX1, CX2, CX3, CX4 and CX5 are optional supply filter capacitors; they may be left out if a clean power supply is used. 3. VLED can be connected to either unfiltered or unregulated power supply. The bypass capacitors should be connection before the current limiting resistor R2 respectively. In a noisy environment, including capacitor CX3and CX4 can enhance supply rejection. CX3 that is generally a ceramic capacitor of low inductance providing a wide frequency response while CX4 is tantalum capacitor of big volume and fast frequency response. The use of a tantalum capacitor is more critical on the VLED line, which carries a high current. 4. VCC pin can be connected to either unfiltered or unregulated power supply. The Resistor, R1 together with the capacitors, CX 1and CX2 acts as the low pass filter. 5. IOVCC is connected to the ASIC voltage supply or the VCC supply. The capacitor, CX5 acts as the bypass capacitor.
Noise sources to be placed as far away from the transceiver as possible Top Layer
CX1 CX2 CX5 CX3 CX4
6. Preferably a multi-layered board should be used to provide sufficient ground plane. Use the layer underneath and near the transceiver module as Vcc, and sandwich that layer between ground connected board layers. The diagram below demonstrate an example of a 4 layer board : * Top Layer: Connect the metal shield and module ground pin to bottom ground layer; Place the bypass capacitors within 0.5cm from the VCC and ground pin of the module. * Layer 2: Critical ground plane zone. 3 cm in all direction around the module. Connect to a clean, noiseless ground node (eg bottom layer). * Layer 3: Keep data bus away from critical ground plane zone. * Bottom layer: Ground layer. Ground noise <75 mVp-p. Should be separated from ground used by noisy sources. The area underneath the module at the second layer, and 3cm in all direction around the module is defined as the critical ground plane zone. The ground plane should be maximized in this zone. Refer to application note AN1114 or the Avago Technologies IrDA Data Link Design Guide for details. The layout below is based on a 2-layer PCB.
R 1
R 2
Top Layer
Layer 3 Layer 2
Bottom Layer
Legend: ground via Bottom Layer (GND)
8
Appendix C: General Application Guide for the ASDL-3023 infrared IrDA Compliant 4 Mb/s Transceiver. Description
The ASDL-3023, a wide-voltage operating range infrared transceiver is a low-cost and small form factor device that is designed to address the mobile computing market such as PDAs, as well as small embedded mobile products such as digital cameras and cellular phones. It is spectrally suited to universal remote control transmission function at 940 nm typically. It is fully compliant to IrDA 1.4 low power specification up 4Mb/s and support most remote control codes The design of ASDL-3023 also includes the following unique features : * Spectrally suited to universal remote transmission function at 940nm typically; * Low passive component count; * Shutdown mode for low power consumption requirement; * Direct interface with I/O logic circuit. control
Interface to the Recommended I/O chip
The ASDL-3023's TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required. Data rate from 9.6kb/s to 4Mb/s is available at RXD pin. The TXD_RC, pin6 together with LEDA, pin1 is used to selected the remote control transmit mode. Alternatively, the TXD_IR, pin2 together with LEDA, pin1 is used for infrared transmit selection. Following shows the hardware reference design with ASDL-3023 *Detail configuration of ASDL-3023 with the controller chip is shown in Figure 3. The use of the infrared techniques for data communication has increase rapidly lately and almost all mobile application processors have built in the IR port. This does away with the external Endec and simplifies the interfacing to a direct connection between the processor and the transceiver. The next section discusses interfacing configuration with a general processor.
Selection of Resistor R2
Resistor R2 should be selected to provide the appropriate peak pulse IR and RC LED current respectively at different ranges of Vcc as shown on page 3 under "Recommended Application circuit components".
STN/TFT LCD Panel Key Pad
LCD Control Touch Panel A/D
Peripherial interface PWM
LCD Backlight Contrast
*ASDL-3023 Mobile Application chipset IrDA interface AC97 sound Memory Expansion Logic Bus Driver Memory I/F Baseband I2S controller Audio Input
PCM Sound
ROM FLASH SDRAM
Power Management
Antenna
Figure 2. Mobile Application Platform
9
General mobile application processor
The transceiver is directly interface with the microprocessor provided its support infrared communication commonly known as Infrared Communications Port (ICP). The ICP supports both SIR data rates up to 115.2kps and sometimes FIR data with data rates up to 4Mbps. The remote control commands can be sent one of the available General Purpose IO pins or the UART block with IrDA functionality. It should be should be observed that although both IrDA data transmission and Remote control transmission is possible simultaneously by the hardware, hence the software is required to resolve this issue to prevent the mixing and corruption of data while being transmitted over the free air. The above Figure 3 illustrates a reference interfacing to implement both IR and RC functionality with ASDL-3023.
Remote Control Operation
The ASDL-3023 is spectrally suited to universal remote control transmission function at 940nm typically. Remote control applications are not governed by any standards, owing to which there are numerous remote codes in market. Each of those standards results in receiver modules with different sensitivities, depending on the carries frequencies and responsively to the incident light wavelength. Remote control carrier frequencies are in the range of 30KHz to 60KHz (for details of some the frequently used carrier frequencies, please refer to AN1314). Some common carrier frequencies and the corresponding SA-1110 UART frequency and baud rate divisor are shown in Table 3.
Table 3.
Remote Control Carrier Frequency (KHz) 0 , 6,6.7,8,9.,40 56 SA-1110 UART Frequency (KHz) 8.8 .9 8.4 57.6 Baud Rate Divisor 8 7 6 4
VCC R1 IOVCC CX1 CX2 VCC IOVCC CX5 GPIO IR_RXD GPIO IR_TXD 100Kohm VLED GND TXD_RC RXD SD TXD_IR R3 VLEDA 100Kohm GND CX3 CX4 HSDL3021 GND GND
IOVCC
GND
GND
Figure 3. ASDL-3023 configuration with general mobile architecture processor
0
Appendix E: Window Design for ASDL-3023.
OPAQUE MATERIAL IR TRANSPARENT WINDOW
Y
X
Z OPAQUE WINDOW
T
IR TRANSPARENT WINDOW Z
To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cones angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 300 and the maximum size corresponds to a cone angle of 600. In the figure above, X is the width of the window, Y is the height of window, Z is the distance from the ASDL-3023 to the back of the window and T is the thickness of the IR transparent window. W = 0.3456*T, W2 = 0.6967*T, where T is the window thickness For the modules depth values that are not shown on the tables above, the minimum X and Y values can be interpolated.
Depth(Z) 0 4 5 6 7 8 9 0
Y(Min) .70+W .+W .77+W .+W .84+W 4.8+W 4.9+W 5.45+W 5.99+W 6.5+W 7.06+W
X(Min) 7.0+W 7.7+W 8.7+W 8.8+W 9.4+W 9.88+W 0.4+W 0.95+W .49+W .0+W .56+W
Y(Max) .66+W 4.8+W 5.97+W 7.+W 8.8+W 9.4+W 0.59+W .74+W .90+W 4.05+W 5.+W
X(Max) 9.6+W 0.+W .47+W .6+W .78+W 4.9+W 6.09+W 7.4+W 8.40+W 9.55+W 0.7+W
Window Material
Almost any plastic material will work as a window material. Polycarbonate is recommended. The surface finish of the plastic should be smooth, without any texture. An IR filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. Light loss should be measured at 875 nm. The recommended plastic materials for use as a cosmetic window are available from General Electric Plastics.
Shape of the Window
From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechanical or industrial design reasons, place the same curve on the backside of the window that has an identical radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. The amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm.
Recommended Plastic Materials:
Material # Lexan 4 Lexan 90A Lexan 940A Light Transmission 88% 85% 85% Haze % % % Refractive Index .586 .586 .586
Note: 920A and 940A are more flame retardant than 141.
Recommended Dye: Violet #21051 (IR transmissant above 625mm)
Flat Window, (First Choice)
Curved Front and Back, (Second Choice)
Curved Front, Flat Back, (Do not use)
Appendix F: General Application Guide for the ASDL-3023 Remote Control Drive Modes
The ASDL-3023 can operate in the single-TxD programmable mode or the two-TxD direct transmission mode.
Two-TxD Direct Transmission Mode
In the two-TxD direct transmission mode, the LED can be driven separately for IrDA and RC mode of operation through the TxD_IR and TxD_RC pins respectively. This mode can be used when the external controller utilizes separate transmit pins for IrDA and RC operation modes, thereby eliminating the need for external multiplexing. Please refer to the Transceiver I/O truth table for more detail. Transceiver Control I/O Truth Table for Two-TxD Direct Transmission Mode SD 0 0 0 0
*
Single-TxD Programmable Mode
In the single-TxD programmable mode, only one input pin (TxD_IR input pin) is used to drive the LED in both IrDA mode as well as Remote Control mode of operation. This mode can be used when the external controller uses only one transmit pin for both IrDA as well RC mode of operation. transceiver is in default mode (IrDA-SIR) when powered up. The user needs to apply the following programming sequence to both the TxD_IR and SD inputs to enable the transceiver to operate in either the IrDA or remote control mode.
TxIR 0 0 0
TxRC 0 0 0
LED OFF ON ON OFF
Remarks IR Rx enabled. Idle mode Remote control operation IrDA Tx operation Not recommended (Both Transmitters off) Shutdown mode*
The shutdown condition will set the transceiver to the default mode (IrDA-SIR)
tC tTL SHUTDOWN (ACTIVE HIGH) TxIR (ACTIVE HIGH) SHUTDOWN TxRC (GND) DRIVE IrDA LED RC MODE DRIVE RC LED DRIVE IrDA LED tA tB tH tH tC tH
RESET
Mode Programming Timing Table
The following timings describe input constraints required using the active serial interface for mode programming with pins SD, TxIR, and TxRC: Parameter Shutdown input pulse width, at pin SD SD mode setup time TxIR pulse width for RC mode SD programming pulse width Note: ( tA + tB ) < tC < tSDPW TxIR setup time for SIR or MIR/FIR mode TxIR or SD hold time to latch SIR, MIR/FIR or RC mode Symbol tSDPW tA tB tC tS tH Min 0 00 00 50 50 Typ Max 5.0 Unit s Ns Ns s Ns Ns Notes Will activate complete shutdown Setup for mode programming RC drive enabled with pin TxIR Pulse width mode programming Setup time for IrDA bandwidth selection Hold time for IrDA or RC modes
Bandwidth Selection Timing
The power on state should be the IrDA SIR mode. The data transfer rate must be set by a programming sequence using the TxD_IR and SD inputs as described below. Note: SD should not exceed the maximum, tC 5s, to prevent shutdown.
Setting to the LOW Bandwidth SIR Mode (2.4kbits/s to 115.2kbits/s)
1. Set SD input to logic "HIGH". 2. Set TxIR input to logic "LOW". Wait tS 50ns. 3. Set SD to logic "LOW" (this negative edge latches state of TxIR, which determines speed setting). 4. TxIR must be held for tS 50ns. TxIR is now re-enabled as normal IrDA transmit input for the Low Bandwidth SIR mode.
Setting to the High Bandwidth MIR/FIR Mode (0.576Mbits/s to 4Mbits/s)
1. Set SD input to logic "HIGH". Wait tA 200ns 2. Set TxD_IR input to logic "HIGH". Wait tS 50ns. 3. Set SD to logic "LOW" (this negative edge latches state of TxD_IR, which determines speed setting). 4. After waiting tH 50ns TxD_IR can be set to logic "LOW". TxD_IR is now re-enabled as normal IrDA transmit input for the High Bandwidth MIR/FIR mode.
50%
SD
tA 50% TxI R
tC tS
50%
tH
High: MIR/FIR
50%
Low: SIR
4
Power-Up Sequencing
To have a proper operation for ASDL-3023, the following power-up sequencing must be followed. (a) It's strongly recommended that Vcc must come prior to IOVcc.
V CC IOV CC t SDDL > 30us - SD t SDPW > 30us - t IOVccDL > 0us -
(b) It is not recommended to turn on IOVcc before Vcc while SD is low. However, for application that IOVcc come prior to Vcc while SD is low, SD pin has to set high to assure proper functionality.
V CC IOV CC SD t SDDL > 30us - t SDPW > 30us -
(c) Setting IOVcc high before Vcc while SD is high is forbidden.
V CC IOV CC SD Note: t IOVccDL : IOVcc delay time t SDDL : SD delay time t SDPW : Shutdown Input Pulse Width
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright (c) 007 Avago Technologies Limited. All rights reserved. AV0-0054EN - May 7, 007

▲Up To Search▲

Price & Availability of ASDL-3023

	To Download ASDL-3023 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .